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<div class="header">
  <div class="summary">
<a href="#enum-members">Enumerations</a>  </div>
  <div class="headertitle">
<div class="title">Enumerated Types<div class="ingroups"><a class="el" href="group__group__sysclk.html">SysClk       (System Clock)</a> &raquo; <a class="el" href="group__group__sysclk__fll.html">Frequency Locked Loop (FLL)</a></div></div>  </div>
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<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:ga777e08424e26c9cd8c2602b2114e716b"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__fll__enums.html#ga777e08424e26c9cd8c2602b2114e716b">cy_en_fll_pll_output_mode_t</a> { <br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#gga777e08424e26c9cd8c2602b2114e716bacd71b0d705fcb6d646c7f439e6de3cf0">CY_SYSCLK_FLLPLL_OUTPUT_AUTO</a> = 0U, 
<br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#gga777e08424e26c9cd8c2602b2114e716baafd3f32e2a1e428617dc19089ed05ff2">CY_SYSCLK_FLLPLL_OUTPUT_AUTO1</a> = 1U, 
<br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#gga777e08424e26c9cd8c2602b2114e716baf2893197c53d0101be01ef926a33528b">CY_SYSCLK_FLLPLL_OUTPUT_INPUT</a> = 2U, 
<br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#gga777e08424e26c9cd8c2602b2114e716baf9198d7cbbee5db8e8c48375125aee74">CY_SYSCLK_FLLPLL_OUTPUT_OUTPUT</a> = 3U
<br />
 }<tr class="memdesc:ga777e08424e26c9cd8c2602b2114e716b"><td class="mdescLeft">&#160;</td><td class="mdescRight">FLL and PLL output mode.  <a href="group__group__sysclk__fll__enums.html#ga777e08424e26c9cd8c2602b2114e716b">More...</a><br /></td></tr>
</td></tr>
<tr class="separator:ga777e08424e26c9cd8c2602b2114e716b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8760ee841ca24255c9a4fee494b79aa"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__fll__enums.html#gac8760ee841ca24255c9a4fee494b79aa">cy_en_fll_cco_ranges_t</a> { <br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#ggac8760ee841ca24255c9a4fee494b79aaa0ce4289849ab8334322db55ef632340c">CY_SYSCLK_FLL_CCO_RANGE0</a>, 
<br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#ggac8760ee841ca24255c9a4fee494b79aaaa6afccaff47c79df8ee4f601a8f3d12c">CY_SYSCLK_FLL_CCO_RANGE1</a>, 
<br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#ggac8760ee841ca24255c9a4fee494b79aaa8b869d6fc9950701b3664b5c6337dd1b">CY_SYSCLK_FLL_CCO_RANGE2</a>, 
<br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#ggac8760ee841ca24255c9a4fee494b79aaa785e86a34e2b717687f5004614eecef5">CY_SYSCLK_FLL_CCO_RANGE3</a>, 
<br />
&#160;&#160;<a class="el" href="group__group__sysclk__fll__enums.html#ggac8760ee841ca24255c9a4fee494b79aaa6c50c6395080bcf0cc45094a6eaf22b4">CY_SYSCLK_FLL_CCO_RANGE4</a>
<br />
 }<tr class="memdesc:gac8760ee841ca24255c9a4fee494b79aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">FLL current-controlled oscillator (CCO) frequency ranges.  <a href="group__group__sysclk__fll__enums.html#gac8760ee841ca24255c9a4fee494b79aa">More...</a><br /></td></tr>
</td></tr>
<tr class="separator:gac8760ee841ca24255c9a4fee494b79aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Enumeration Type Documentation</h2>
<a id="ga777e08424e26c9cd8c2602b2114e716b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga777e08424e26c9cd8c2602b2114e716b">&#9670;&nbsp;</a></span>cy_en_fll_pll_output_mode_t</h2>

<div class="memitem">
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          <td class="memname">enum <a class="el" href="group__group__sysclk__fll__enums.html#ga777e08424e26c9cd8c2602b2114e716b">cy_en_fll_pll_output_mode_t</a></td>
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<p>FLL and PLL output mode. </p>
<p>See registers CLK_FLL_CONFIG3 and CLK_PLL_CONFIG0, bits BYPASS_SEL. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="gga777e08424e26c9cd8c2602b2114e716bacd71b0d705fcb6d646c7f439e6de3cf0"></a>CY_SYSCLK_FLLPLL_OUTPUT_AUTO&#160;</td><td class="fielddoc"><p>Output FLL/PLL input source when not locked, and FLL/PLL output when locked. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga777e08424e26c9cd8c2602b2114e716baafd3f32e2a1e428617dc19089ed05ff2"></a>CY_SYSCLK_FLLPLL_OUTPUT_AUTO1&#160;</td><td class="fielddoc"><p>Same as AUTO. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga777e08424e26c9cd8c2602b2114e716baf2893197c53d0101be01ef926a33528b"></a>CY_SYSCLK_FLLPLL_OUTPUT_INPUT&#160;</td><td class="fielddoc"><p>Output FLL/PLL input source regardless of lock status. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga777e08424e26c9cd8c2602b2114e716baf9198d7cbbee5db8e8c48375125aee74"></a>CY_SYSCLK_FLLPLL_OUTPUT_OUTPUT&#160;</td><td class="fielddoc"><p>Output FLL/PLL output regardless of lock status. </p>
<p>This can be dangerous if used to clock clkHf, because FLL/PLL output may be unstable </p>
</td></tr>
</table>

</div>
</div>
<a id="gac8760ee841ca24255c9a4fee494b79aa"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac8760ee841ca24255c9a4fee494b79aa">&#9670;&nbsp;</a></span>cy_en_fll_cco_ranges_t</h2>

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          <td class="memname">enum <a class="el" href="group__group__sysclk__fll__enums.html#gac8760ee841ca24255c9a4fee494b79aa">cy_en_fll_cco_ranges_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>FLL current-controlled oscillator (CCO) frequency ranges. </p>
<p>See register CLK_FLL_CONFIG4, bits CCO_RANGE. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ggac8760ee841ca24255c9a4fee494b79aaa0ce4289849ab8334322db55ef632340c"></a>CY_SYSCLK_FLL_CCO_RANGE0&#160;</td><td class="fielddoc"><p>Target frequency is in range 48 - 64 MHz. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggac8760ee841ca24255c9a4fee494b79aaaa6afccaff47c79df8ee4f601a8f3d12c"></a>CY_SYSCLK_FLL_CCO_RANGE1&#160;</td><td class="fielddoc"><p>Target frequency is in range 64 - 85 MHz. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggac8760ee841ca24255c9a4fee494b79aaa8b869d6fc9950701b3664b5c6337dd1b"></a>CY_SYSCLK_FLL_CCO_RANGE2&#160;</td><td class="fielddoc"><p>Target frequency is in range 85 - 113 MHz. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggac8760ee841ca24255c9a4fee494b79aaa785e86a34e2b717687f5004614eecef5"></a>CY_SYSCLK_FLL_CCO_RANGE3&#160;</td><td class="fielddoc"><p>Target frequency is in range 113 - 150 MHz. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggac8760ee841ca24255c9a4fee494b79aaa6c50c6395080bcf0cc45094a6eaf22b4"></a>CY_SYSCLK_FLL_CCO_RANGE4&#160;</td><td class="fielddoc"><p>Target frequency is in range 150 - 200 MHz. </p>
</td></tr>
</table>

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